Features: • High-density 3.3V 4-megabit SRAM module• 32-bit standard footprint supports densities from 16K x 32 through 1M x 32• High-speed CMOS SRAMs• Access time of 25 ns -Low active power 1.6W (max.) at 20 ns• 2.0V Data Retention (ICCDRL = 0.8 mA, max.)• SMD ...
CYM1836V33: Features: • High-density 3.3V 4-megabit SRAM module• 32-bit standard footprint supports densities from 16K x 32 through 1M x 32• High-speed CMOS SRAMs• Access time of 25 ns -...
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The CYM1836V33 is a 3.3V high-performance 4-megabit static RAM module organized as 128K words by 32 bits. The CYM1836V33 is constructed from four 128K x 8 SRAMs in SOJ packages mounted on an epoxy laminate board with pins. Four chip selects CS1, CS2, CS3, CS4) are used to independently enable the four bytes. Reading or writing of the CYM1836V33 can be executed on individual bytes or any combination of multiple bytes through proper use of selects.
Writing to each byte is accomplished when the appropriate chip select (CS) and write enable (WE) inputs are both LOW. Data on the input/output pins (I/O) of the CYM1836V33 is written into the memory location specified on the address pins (A0 through A16). Reading the device is accomplished by taking the chip select (CS) LOW while write enable (WE) remains HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the data input/ output pins (I/O).
The data input/output pins of the CYM1836V33 stay at the high-impedance state when write enable is LOW or the appropriate chip selects are HIGH.
Two pins (PD0 and PD1) of the CYM1836V33 are used to identify module memory density in applications where alternate versions of the JEDEC-standard modules can be interchanged.