Features: • 2048 x 9 FIFO buffer memory• Bidirectional operation• High-speed 28.5-MHz asynchronous reads and writes• Simple control interface• Registered and transparent bypass modes• Flags indicate Empty, Full, and Half Full conditions• 5V ± 10% supply...
CY7C439: Features: • 2048 x 9 FIFO buffer memory• Bidirectional operation• High-speed 28.5-MHz asynchronous reads and writes• Simple control interface• Registered and transparen...
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The CY7C439 is a 2048 x 9 FIFO memory capable of bidirectional operation. As the term first-in first-out (FIFO) implies, data becomes available to the output port in the same order that it was presented to the input port. There are two pins that indicate the amount of data contained within the FIFO block-E/F (Empty/Full) and HF (Half Full). These pins can be decoded to determine one of four states. Two 9-bit data ports are provided. The direction selected for the FIFO determines the input and output ports. The FIFO direction can be programmed by the user at any time through the use of the reset pin (MR) and the bypass/direction pin (BYPA). There are no control or status registers on the CY7C439, making the part simple to use while meeting the needs of the majority of bidirectional FIFO applications.
FIFO read and write operations may occur simultaneously, and each can occur at up to 28.5 MHz. The port designated as the write port drives its strobe pin (STBX, X = A or B) LOW to initiate the write operation. The port designated as the read port drives its strobe pin LOW to initiate the read operation. Output port pins of the CY7C439 go to a high-impedance state when the associated strobe pin is HIGH. All normal FIFO operations require the bypass control pin (BYPX, X = A or B) to remain HIGH.
In addition to the FIFO of the CY7C439, two other data paths are provided; registered bypass and transparent bypass. Registered bypass can be considered as a single-word FIFO in the reverse direction to the main FIFO. The