Features: • 192 macrocells in 12 LABs
• 8 dedicated inputs, 64 bidirectional I/O pin
• 0.8-micron double-metal CMOS EPROM technology
• Programmable interconnect array
• 384 expander product terms
• Available in 84-pin HLCC, PLCC, and PGA packagesPinout
Specifications(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .......................................−65°C to +150°C
Ambient Temperature with
Power Applied.................................................... 0°C to +70°C
Maximum Junction Temperature
(Under Bias)................................................................. 150°C
Supply Voltage to Ground Potential..................−2.0V to +7.0V
Maximum Power Dissipation...................................2500 mW
DC VCC or GND Current......................................................500 mA
DC Output Current, per Pin ........................ −25 mA to +25 mA
DC Input Voltage[1] ................................................−3.0V to +7.0V
DC Program Voltage..................................................... 13.0V
Static Discharge Voltage................................................. >1100V
(per MIL-STD-883, method 3015)DescriptionThe CY7C341 is an Erasable Programmable Logic Device (EPLD) in which CMOS EPROM cells are used to configure logic functions within the CY7C341. The MAX architecture is 100% user-configurable, allowing the devices to accommodate a variety of independent logic functions.
The 192 macrocells in the CY7C341 are divided into 12 Logic Array Blocks (LABs), 16 per LAB. There are 384 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB. Each LAB is interconnected with a programmable interconnect array, allowing all signals to be routed throughout the chip.
The speed and density of the CY7C341 allows them to be used in a wide range of applications, from replacement of large amounts of 7400-series TTL logic, to complex controllers and multifunction chips. With greater than 37 times the functionality of 20-pin PLDs, the CY7C341 allows the replacement of over 75 TTL devices. By replacing large amounts of logic, the CY7C341 reduces board space and part count, and increases system reliability.
Each LAB of CY7C341 contains 16 macrocells. In LABs A, F, G, and L, 8 macrocells are connected to I/O pins and 8 are buried, while for LABs B, C, D, E, H, I, J, and K, 4 macrocells are connected to I/O pins and 12 are buried. Moreover, in addition to the I/O and buried macrocells, there are 32 single product term logic expanders in each LAB. Their use greatly enhances the capability of the macrocells without increasing the number of product terms in each macrocell.
CY7C341 Data Sheet
