CY7C335 Selling Leads, Price trend, CY7C335 DataSheet download, circuit diagram from SeekIC.com

Features: • 100-MHz output registered operation• Twelve I/O macrocells, each having:-Registered, three-state I/O pins -Input and output register clock select multiplexer -Feed back multiplexer -Output enable (OE) multiplexer• Bypass on input and output registers• All twelve...

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SeekIC No. : 004320304 Detail

CY7C335: Features: • 100-MHz output registered operation• Twelve I/O macrocells, each having:-Registered, three-state I/O pins -Input and output register clock select multiplexer -Feed back multi...

CY7C335 Data Sheet

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Part Number:: CY7C335
Supply Ability:: 5000

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1~5000

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Product Details

Description

Features:

• 100-MHz output registered operation
• Twelve I/O macrocells, each having:
  -Registered, three-state I/O pins
-Input and output register clock select multiplexer
-Feed back multiplexer
-Output enable (OE) multiplexer
• Bypass on input and output registers
• All twelve macrocell state registers can be hidden
• User configurable I/O macrocells to implement JK or RS flip-flops and T or D registers
• Input multiplexer per pair of I/O macrocells allows I/O pin associated with a hidden macrocell state register to be saved for use as an input
• Four dedicated hidden registers
• Twelve dedicated registered inputs with individually programmable bypass option
• Three separate clocks-two input clocks, two output clocks
• Common (pin 14-controlled) or product term-controlled output enable for each I/O pin
• 256 product terms-32 per pair of macrocells, variable distribution
• Global, synchronous, product term-controlled, state register set and reset-inputs to product term are clocked by input clock
   -2-ns input set-up and 9-ns output register clock to output
   -10-ns input register clock to state register clock
• 28-pin, 300-mil DIP, LCC, PLCC
• Erasable and reprogrammable
• Programmable security bit

Pinout

Connection Diagram

Specifications

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ...................................65°C to +150°C
Ambient Temperature with
Power Applied...............................................55°C to +125°C
Supply Voltage to Ground Potential
(Pin 22 to Pins 8 and 21) ............................... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State ............................................... 0.5V to +7.0V
DC Input Voltage............................................ 3.0V to +7.0V
Output Current into Outputs (Low)...............................12 mA
Static Discharge Voltage ........................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current..................................................... >200 mA
DC Programming Voltage............................................. 13.0V

Description

The CY7C335 is a high-performance, erasable, programmable logic device (EPLD) whose architecture has been optimized to enable the user to easily and efficiently construct very high performance state machines.

The architecture of the CY7C335, consisting of the user-configurable output macrocell, bidirectional I/O capability, input registers, and three separate clocks, enables the user to design high-performance state machines that can communicate either with each other or with microprocessors over bidirectional parallel buses of user-definable widths.

The four clocks permit independent, synchronous state machines to be synchronized to each other.

The user-configurable macrocells of CY7C335 enable the designer to designate JK-, RS-, T-, or D-type devices so that the number of product terms required to implement the logic is minimized.

The CY7C335 is available in a wide variety of packages including 28-pin, 300-mil plastic and ceramic DIPs, PLCCs, and LCCs.

CY7C335

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