Features: • CMOS for optimum speed/power• Windowed for reprogrammability• High speed-30 ns (Commercial)-35 ns (Military)• Low power-660 mW (commercial)-715 mW (military)• Super low standby power-Less than 165 mW when deselected• EPROM technology 100% programmabl...
CY7C274-45JC: Features: • CMOS for optimum speed/power• Windowed for reprogrammability• High speed-30 ns (Commercial)-35 ns (Military)• Low power-660 mW (commercial)-715 mW (military)̶...
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The CY7C271 and CY7C274 are high-performance 32,768-word by 8-bit CMOS PROMs. When disabled (CE HIGH), the 7C271/7C274 automatically powers down into a low-power stand-by mode. The CY7C271 is packaged in the 300-mil slim package. The CY7C274 is packaged in the industry standard 600-mil package. Both the CY7C271 and CY7C274 are available in a cerDIP package equipped with an erasure window to provide for reprogrammability. When exposed to UV light, the PROM is erased and can be reprogrammed. The memory cells of CY7C271 and CY7C274 utilize proven EPROM floating gate technology and byte-wide intelligent programming algorithms.
The CY7C271 and CY7C274 offer the advantage of lower power, superior performance, and programming yield. The EPROM cell requires only 12.5V for the super voltage, and low current requirements allow for gang programming. The EPROM cells allow each memory location to be tested 100% because each location is written into, erased, and repeatedly exercised prior to encapsulation. Each PROM is also tested for AC performance to guarantee that after customer
programming, the product will meet DC and AC specification limits.
Reading the 7C271 is accomplished by placing active LOW signals on CS1 and CE, and an active HIGH on CS2. Reading the 7C274 is accomplished by placing active LOW signals on OE and CE. The contents of the memory location addressed by the address lines (A0−A14) will become available on the output lines (O0−O7).