CY7C186

The CY7C186 is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion isprovided by an active LOW chip enable (CE₁), an active HIGH chip enable (CE₂), and active LOW output enable (OE) and three-state drivers. The device has an automatic power-down feature (CE₁), reducing the power consumption by over 80% when deselected. The CY7C186 is in a 600-mil-wide PDIP package and a 32-pin TSOP (std. pinout).

An active LOW write enable signal (WE) of CY7C186 controls the writing/ reading operation of the memory. When CE₁ and WE inputs are both LOW and CE₂ is HIGH, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A12). Reading the CY7C186 is accomplished by selecting the device and enabling the outputs, CE₁ and OE active LOW, CE₂ active HIGH, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input/output pins.

The input/output pins of CY7C186 remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH. A die coat is used to insure alpha immunity.