Features: • 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36)• 300-MHz clock for high bandwidth• 2-Word burst for reducing address bus frequency• Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz• Two input clocks (K and K) for precise DDR t...
CY7C1392BV18: Features: • 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36)• 300-MHz clock for high bandwidth• 2-Word burst for reducing address bus frequency• Double Data Rate (DDR) in...
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