CY7C128A-25VC

The CY7C128A is a high-performance CMOS static RAM organized as 2048 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE), and active LOW output enable (OE) and three-state drivers. The CY7C128A has an automatic power-down feature, reducing the power consumption by 83% when deselected.

Writing to CY7C128A-25VC is accomplished when the chip enable (CE) and write enable (WE) inputs are both LOW.

Data on the eight I/O pins (I/O0 through I/O7) is written into the memory location specified on the address pins (A0 through A10).

Reading CY7C128A-25VC is accomplished by taking chip enable (CE) and output enable (OE) LOW while write enable (WE) remains HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the eight I/O pins. The I/O pins remain in high-impedance state when chip enable (CE) or output enable (OE) is HIGH or write enable (WE) is LOW.

The CY7C128A utilizes a die coat to insure alpha immunity.