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CY7C107

Features: • High speed -tAA = 12 ns• CMOS for optimum speed/power• Low active power -825 mW• Low standby power -275 mW• 2.0V data retention (optional) -100 µW• Automatic power-down when deselected• TTL-compatible inputs and outputsPinoutSpecification...

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SeekIC No. : 004319820 Detail

CY7C107: Features: • High speed -tAA = 12 ns• CMOS for optimum speed/power• Low active power -825 mW• Low standby power -275 mW• 2.0V data retention (optional) -100 µWR...

CY7C107 Data Sheet

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Part Number:
CY7C107
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High speed
   -tAA = 12 ns
• CMOS for optimum speed/power
• Low active power
   -825 mW
• Low standby power
   -275 mW
• 2.0V data retention (optional)
   -100 µW
• Automatic power-down when deselected
• TTL-compatible inputs and outputs


Pinout

Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ............................. −65°C to +150°C
Ambient Temperature with
Power Applied......................................... −55°C to +125°C
Supply Voltage on VCC Relative to GND[1] ....−0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[1] .................................−0.5V to VCC + 0.5V
DC Input Voltage[1]..............................−0.5V to VCC + 0.5V
Current into Outputs (LOW)...................................... 20 mA
Static Discharge Voltage ........................................ >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current................................................... >200 mA


Description

The CY7C107 and CY7C1007 are high-performance CMOS static RAMs organized as 1,048,576 words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. These devices have an automatic power-down feature that reduces power consumption by more than 65% when deselected.

Writing to CY7C107 is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the input pin (DIN) is written into the memory location specified on the address pins (A0 through A19).

Reading from the devices is accomplished by taking Chip Enable (CE) LOW while Write Enable (WE) remains HIGH. Under these conditions, the contents of the memory location CY7C107 specified by the address pins will appear on the data output (DOUT) pin.

The output pin (DOUT) is placed in a high-impedance state when the device is deselected (CE HIGH) or during a write operation (CE and WE LOW).

The CY7C107 is available in a standard 400-mil-wide SOJ; the CY7C1007 is available in a standard 300-mil-wide SOJ.




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