Features: • High speed
-tAA = 8, 10, 12 ns
• Low active power
-1080 mW (max.)
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE1, CE2, and CE3 featuresSpecificationsStorage Temperature .................................65°C to +150°C
Ambient Temperature with
Power Applied.............................................55°C to +125°C
Supply Voltage on VCC to Relative GND[1] .... 0.5V to +4.6V
DC Voltage Applied to Outputs
in High-Z State[1] ..................................0.5V to VCC + 0.5V
DC Input Voltage[1] .............................. 0.5V to VCC + 0.5V
Current into Outputs (LOW)......................................... 20 mA
DescriptionThe CY7C1062AV33 is a high-performance CMOS Static RAM organized as 524,288 words by 32 bits.
Writing to CY7C1062AV33 is accomplished by enabling the chip (CE1, CE2 and CE3 LOW) and forcing the Write Enable (WE) input LOW. If Byte Enable A (BA) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified onthe address pins (A0 through A18). If Byte Enable B (BB) is LOW, then data from I/O pins (I/O8 through I/O15) CY7C1062AV33 is written into the location specified on the address pins (A0 through A18). Likewise, BC and BD correspond with the I/O pins I/O16 to I/O23 and I/O24 to I/O31, respectively.
Reading from CY7C1062AV33 is accomplished by enabling the chip (CE1, CE2, and CE3 LOW) while forcing the Output Enable (OE) LOW and Write Enable (WE) HIGH. If the first Byte Enable (BA) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte Enable B (BB) is LOW, then data of CY7C1062AV33 from memory will appear on I/O8 to I/O15. Similarly, Bc and BD correspond to the third and fourth bytes. See the truth table at the back of this data sheet for a complete description of read and write modes.
The input/output pins (I/O0 through I/O31) are placed in a high-impedance state when CY7C1062AV33 is deselected (CE1, CE2or CE3 HIGH), the outputs are disabled (OE HIGH), the byte selects are disabled (BA-D HIGH), or during a write operation (CE1, CE2, and CE3 LOW, and WE LOW). The CY7C1062AV33 is available in a 119-ball pitch ball grid array (PBGA) package.
CY7C1062AV33 Data Sheet
