CY7C1061BV33

Features: • High speed - tAA = 8, 10, 12 ns• Low active power - 1080 mW (max.)• Operating voltages of 3.3 ± 0.3V• 2.0V data retention• Automatic power-down when deselected• TTL-compatible inputs and outputsPinoutSpecifications(Above which the useful life may be ...

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CY7C1061BV33 Picture
SeekIC No. : 004319811 Detail

CY7C1061BV33: Features: • High speed - tAA = 8, 10, 12 ns• Low active power - 1080 mW (max.)• Operating voltages of 3.3 ± 0.3V• 2.0V data retention• Automatic power-down when deselec...

floor Price/Ceiling Price

Part Number:
CY7C1061BV33
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

• High speed
    - tAA = 8, 10, 12 ns
• Low active power
    - 1080 mW (max.)
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs



Pinout

  Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guidelines,not tested.)
Storage Temperature .............................. ..65°C to +150°C
Ambient Temperature with
Power Applied..........................................55°C to +125°C
Supply Voltage on VCC to Relative GND[3] .... 0.5V to +4.6V
DC Voltage Applied to Outputs
in High-Z State[3] ..................................0.5V to VCC + 0.5V
DC Input Voltage[3] ...............................0.5V to VCC + 0.5V
Current into Outputs (LOW)......................................... 20 mA



Description

The CY7C1061BV33 is a high-performance CMOS Static RAM organized as 1,048,576 words by 16 bits.

Writing to CY7C1061BV33 is accomplished by enabling the chip (CE LOW) while forcing the Write Enable (WE) input LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), CY7C1061BV33 is written into the location specified on the address pins (A0 through A19). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A19).

Reading from CY7C1061BV33 is accomplished by enabling the chip by taking CE LOW while forcing the Output Enable (OE) LOW and the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table of CY7C1061BV33 at the back of this data sheet for a complete description of Read and Write modes.

The input/output pins (I/O0 through I/O15) CY7C1061BV33 are placed in a  high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a Write operation (CE LOW and WE LOW).

The CY7C1061BV33 is available in a 54-pin TSOP II package with center power and ground (revolutionary) pinout.


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