Features: •High speed-tAA = 8, 10, 12 ns
•Low active power-1080 mW (max.)
•Operating voltages of 2.5 ± 0.2V
•1.5V data retention
•Automatic power-down when deselected
•TTL-compatible inputs and outputs
•Easy memory expansion with CE1 and CE2 featuresPinout
Specifications(Above which the useful life may be impaired. For user guide-lines, not tested.)
Storage Temperature ...................................65°C to +150°C
Ambient Temperature with
Power Applied...............................................55°C to +125°C
Supply Voltage on VCC to Relative GND[1]..........0.5V to +3.6V
DC Voltage Applied to Outputs
in High-Z State[1]............................................0.5V to V + 0.5V
DC Input Voltage[1]....................................0.5V to VCC + 0.5V
Current into Outputs (LOW)..............................................20 mA
DescriptionThe CY7C1061AV25 is a high-performance CMOS StaticRAM organized as 1,048,576 words by 16 bits.
Writing to CY7C1061AV25 is accomplished by enabling the chip(CE1 LOW and CE2 HIGH) while forcing the Write Enable(WE) input LOW. If Byte Low Enable (BLE) is LOW, then datafrom I/O pins (I/O through I/O7), is written into the location specified on the address pins (A0 through A19). If Byte HighEnable (BHE) is LOW, then data from I/O pins CY7C1061AV25 (I/O8 throughI/O15) is written into the location specified on the address pins(A0 through A19).
by taking CE1 LOW and CE2 HIGH while forcing the OutputEnable (OE) LOW and the Write Enable (WE) HIGH. If ByteLow Enable (BLE) is LOW, then data of CY7C1061AV25 from the memory locationspecified by the address pins will appear on I/O to I/O7. If ByteHigh Enable (BHE) is LOW, then data from memory CY7C1061AV25 will appearon I/O8 to I/O15 See the truth table at the back of this datasheet for a complete description of Read and Write modes.
0through I/O15) are placed in a12 LOW), the outputs are disabled (OE HIGH), the and BLE are disabled (BHE, BLE HIGH), or during a1 LOW, CE2HIGH, and WE LOW).
The CY7C1061AV25 is available in a 54-pin TSOP II package with center power and ground (revolutionary) pinout, and a 48-ball fine-pitch ball grid array (FBGA) package.
CY7C1061AV25 Data Sheet
