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CY7C1049-25VM_1334675

Features: • High speed -tAA = 15 ns • Low active power -1210 mW (max.)• Low CMOS standby power (Commercial L version) -2.75 mW (max.)• 2.0V Data Retention (400 µW at 2.0V retention)• Automatic power-down when deselected• TTL-compatible inputs and outputs&#...

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SeekIC No. : 004319799 Detail

CY7C1049-25VM_1334675: Features: • High speed -tAA = 15 ns • Low active power -1210 mW (max.)• Low CMOS standby power (Commercial L version) -2.75 mW (max.)• 2.0V Data Retention (400 µW at 2....

CY7C1049-25VM_1334675 Data Sheet

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Part Number:
CY7C1049-25VM_1334675
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High speed
   -tAA = 15 ns
• Low active power
   -1210 mW (max.)
• Low CMOS standby power (Commercial L version)
   -2.75 mW (max.)
• 2.0V Data Retention (400 µW at 2.0V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features


Pinout

Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guide- lines, not tested.)
Storage Temperature  .................................65°C to +150°C
Ambient Temperature with
Power Applied............................................. 55°C to +125°C
Supply Voltage on VCC to Relative GND[1] .. 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[1]....................................0.5V to VCC + 0.5V
DC Input Voltage[1]................................0.5V to VCC + 0.5V
Current into Outputs (LOW) .........................................20 mA
Static Discharge Voltage ........................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current ..................................................... >200 mA


Description

The CY7C1049 is a high-performance CMOS static RAM or- ganized as 524,288 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE), an active LOW
output enable (OE), and three-state drivers. Writing to the de- vice is accomplished by taking chip enable (CE) and write en- able (WE) inputs LOW. Data of CY7C1049-25VM_1334675 on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18).
Reading from the device is accomplished by taking chip en- able (CE) and output enable (OE) LOW while forcing write en- able (WE) HIGH. Under these conditions, the contents of the memory location CY7C1049-25VM_1334675 specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when CY7C1049-25VM_1334675 is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW).
The CY7C1049 is available in a standard 400-mil-wide 36-pin SOJ package with center power and ground (revolutionary) pinout.




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