CY7C1046CV33

Features: High speed-tAA = 10ns Low active power for 10 ns speed -324 mW (max.) 2.0V data retention Automatic power-down when deselected TTL-compatible inputs and outputsEasy memory expansion with CE and OE featuresPinoutSpecificationsStorage Temperature .................................65°C to ...

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SeekIC No. : 004319796 Detail

CY7C1046CV33: Features: High speed-tAA = 10ns Low active power for 10 ns speed -324 mW (max.) 2.0V data retention Automatic power-down when deselected TTL-compatible inputs and outputsEasy memory expansion with...

floor Price/Ceiling Price

Part Number:
CY7C1046CV33
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

 High speed
   -tAA = 10ns

  Low active power for 10 ns speed
   -324 mW (max.)
  2.0V data retention
  Automatic power-down when deselected
  TTL-compatible inputs and outputs
 Easy memory expansion with CE and OE  features



Pinout

  Connection Diagram


Specifications

Storage Temperature  .................................65°C to +150°C
Ambient Temperature with
Power Applied..............................................55°C to +125°C
Supply Voltage on VCC  to Relative GND[3] .......0.5V to +4.6V
DC Voltage Applied to Outputs
in High-Z State[3] .....................................0.5V to VCC  + 0.5V
DC Input Voltage[3] ..................................0.5V to VCC  + 0.5V

Current into Outputs (LOW)..............................................20 mA
Static Discharge Voltage................................................> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..........................................................> 200 mA




Description

The CY7C1046CV33 is a high-performance CMOS static RAM organized as 1,048,576 words by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE ), an active LOW Output Enable (OE ), and three-state drivers.Writing to CY7C1061AV25 is accomplished by taking Chip Enable (CE ) and Write Enable (WE ) inputs LOW. Data on the four I/Opins (I/O0  through I/O3 ) is then written into the location specified on the address pins (A 0 through A19 ).

Reading from CY7C1061AV25 is accomplished by taking Chip Enable (CE ) and Output Enable (OE ) LOW while forcing Write Enable (WE ) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The four input/output pins (I/Othrough I/O3 ) are placed in ahigh-impedance state when CY7C1061AV25 is deselected (CE  HIGH), the outputs are disabled (OE  HIGH), or during a Write operation (CE  LOW, and WE LOW).

The CY7C1046CV33 is available in a standard 400-mil-wide 32-pin SOJ package with center power and ground (revolu- tionary) pinout.




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