CY7C1046

Features: • High speed -tAA = 10 ns• Low active power -1018 mW (max.)• Low CMOS standby power(L version) -2.75 mW (max.)• 2.0V Data Retention (400 µW at 2.0V retention)• Automatic power-down when deselected• TTL-compatible inputs and outputs• Easy me...

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CY7C1046 Picture
SeekIC No. : 004319793 Detail

CY7C1046: Features: • High speed -tAA = 10 ns• Low active power -1018 mW (max.)• Low CMOS standby power(L version) -2.75 mW (max.)• 2.0V Data Retention (400 µW at 2.0V retention)...

floor Price/Ceiling Price

Part Number:
CY7C1046
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• High speed
   -tAA = 10 ns
• Low active power
   -1018 mW (max.)
• Low CMOS standby power(L version)
    -2.75 mW (max.)
• 2.0V Data Retention (400 µW at 2.0V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features



Pinout

  Connection Diagram


Specifications

Storage Temperature ............................. 65°C to +150°C
Ambient Temperature with
Power Applied......................................... 55°C to +125°C
Supply Voltage on VCC to Relative GND[1] ... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[1] ..................................0.5V to VCC + 0.5V
DC Input Voltage[1]...............................0.5V to VCC + 0.5V
Current into Outputs (LOW)........................................ 20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current..................................................... >200 mA



Description

The CY7C1046 is a high-performance CMOS static RAM organized as 1,048,576 words by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the fourI/O pins (I/O0 through I/O3) CY7C1046 is then written into the location specified on the address pins (A0 through A19).

Reading from CY7C1046 is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The four input/output pins (I/O0 through I/O3) are placed in a high-impedance state when CY7C1046 is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW).

The CY7C1046 is available in a standard 400-mil-wide 32-pin SOJ package with center power and ground (revolutionary) pinout.




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