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CY7C1041BV33

Features: • High speed -tAA = 12 ns• Low active power -612 mW (max.)• Low CMOS standby power (Commercial L version) -1.8 mW (max.)• 2.0V Data Retention (600 µW at 2.0V retention)• Automatic power-down when deselected• TTL-compatible inputs and outputs̶...

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SeekIC No. : 004319786 Detail

CY7C1041BV33: Features: • High speed -tAA = 12 ns• Low active power -612 mW (max.)• Low CMOS standby power (Commercial L version) -1.8 mW (max.)• 2.0V Data Retention (600 µW at 2.0V ...

CY7C1041BV33 Data Sheet

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Part Number:
CY7C1041BV33
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High speed
   -tAA = 12 ns
• Low active power
   -612 mW (max.)
• Low CMOS standby power (Commercial L version)
   -1.8 mW (max.)
• 2.0V Data Retention (600 µW at 2.0V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features


Pinout

Connection Diagram


Specifications

Storage Temperature ..............................65°C to +150°C
Ambient Temperature with
Power Applied......................................... 55°C to +125°C
Supply Voltage on VCC to Relative GND[1] .... 0.5V to +4.6V
DC Voltage Applied to Outputs
in High Z State[1] ..................................0.5V to VCC + 0.5V
DC Input Voltage[1] ............................. 0.5V to VCC + 0.5V
Current into Outputs (LOW) ........................................ 20 mA


Description

The CY7C1041BV33 is a high-performance CMOS Static RAM organized as 262,144 words by 16 bits.

Writing to CY7C1041BV33 is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A17). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15)CY7C1041BV33  is written into the location specified on the address pins (A0 through A17).

Reading from CY7C1041BV33 is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins ofCY7C1041BV33 will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of read and write modes.

The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when CY7C1041BV33 is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).

The CY7C1041BV33 is available in a standard 44-pin 400-mil-wide body width SOJ and 44-pin TSOP II package with center power and ground (revolutionary) pinout.




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