CY7C1031-12JC

The CY7C1031-12JC is designed as one kind of 64K by 18 synchronous cache RAM. This device is designed to interface with high-speed microprocessors with minimum glue logic. And is also designed for Intel Pentium and i486 CPU-based systems; CY7C1031-12JC counter follows the burst sequence of the Pentium and the i486 processors.

Features of the CY7C1031-12JC are:(1)Supports 66-MHz Pentium® microprocessor cache systems with zero wait states;(2)64K by 18 common I/O;(3)Fast clock-to-output times: 8.5 ns;(4)Two-bit wraparound counter supporting Pentium microprocessor and 486 burst sequence;(5)Two-bit wraparound counter supporting linear burst sequence;(6)Separate processor and controller address strobes;(7)Synchronous self-timed write;(8)Direct interface with the processor and external cache controller;(9)Asynchronous output enable;(10)I/Os capable of 3.3V operation. If you want to know more information such as the electrical characteristics about the CY7C1031-12JC, please download the datasheet in www.seekic.com or www.chinaicmart.com .