CY7C1024AV33

Features: • High speed -tAA = 10 ns• CMOS for optimum speed/power• Center power/ground pinout• Automatic power-down when deselected• Easy memory expansion withCE1, CE2,CE3 and OE optionsPinoutSpecificationsStorage Temperature .................................65°C to +...

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CY7C1024AV33 Picture
SeekIC No. : 004319778 Detail

CY7C1024AV33: Features: • High speed -tAA = 10 ns• CMOS for optimum speed/power• Center power/ground pinout• Automatic power-down when deselected• Easy memory expansion withCE1, CE2,...

floor Price/Ceiling Price

Part Number:
CY7C1024AV33
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

• High speed
     -tAA = 10 ns
• CMOS for optimum speed/power
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion withCE1, CE2, CE3 and OE options




Pinout

  Connection Diagram


Specifications

Storage Temperature .................................65°C to +150°C
Ambient Temperature with
Power Applied............................................. 55°C to +125°C
Supply Voltage on VCC to Relative GND[2] .... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[2] ....................................0.5V to VCC + 0.5V
DC Input Voltage[2].................................0.5V to VCC + 0.5V
Current into Outputs (LOW) ........................................ 20 mA
Static Discharge Voltage............................................ >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current..................................................... >200 mA




Description

The CY7C1024AV33 is a high-performance CMOS static RAM organized as 131,072 words by 24 bits. Easy memory expansion is provided by an active LOW CE1, CE3, active HIGH CE2, an active LOW Output Enable (OE), and three-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Writing to CY7C1024AV33 is accomplished by taking Chip Enable (CE1, CE2, CE3) active and Write Enable (WE) inputs LOW. Data on the 24 I/O pins (I/O0 through I/O23) is then written into the location specified on the address pins (A0 through A16).

Reading from CY7C1024AV33 is accomplished by taking Chip Enable (CE1, CE2, CE3) active and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The 24 input/output pins (I/O0 through I/O23) are placed in a high-impedance state when CY7C1024AV33 is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE1CE3 LOW, CE2 HIGH, and WE LOW).

The CY7C1024AV33 is available in a standard 119-ball BGA package and a 100-pin TQFP package.




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