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CY7C1021BNV33

Features: • 3.3V operation (3.0V3.6V)• High speed - tAA = 10, 12, 15 ns• CMOS for optimum speed/power• Low Active Power (L version) - 576 mW (max.)• Low CMOS Standby Power (L version) - 1.80 mW (max.)• Automatic power-down when deselected• Independent cont...

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SeekIC No. : 004319766 Detail

CY7C1021BNV33: Features: • 3.3V operation (3.0V3.6V)• High speed - tAA = 10, 12, 15 ns• CMOS for optimum speed/power• Low Active Power (L version) - 576 mW (max.)• Low CMOS Standby Po...

CY7C1021BNV33 Data Sheet

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Part Number:
CY7C1021BNV33
Supply Ability:
5000

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  • 1~5000
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  • 15 Days
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Product Details

Description



Features:

• 3.3V operation (3.0V3.6V)
• High speed
   - tAA = 10, 12, 15 ns
• CMOS for optimum speed/power
• Low Active Power (L version)
   - 576 mW (max.)
• Low CMOS Standby Power (L version)
   - 1.80 mW (max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II and 400-mil SOJ
• Available in a 48-Ball Mini BGA package


Pinout

Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .............................65°C to +150°C
Ambient Temperature with
Power Applied..........................................55°C to +125°C
Supply Voltage on VCC to Relative GND[1] .... 0.5V to +4.6V
DC Voltage Applied to Outputs
in High Z State[1] .....................................0.5V to VCC+0.5V
DC Input Voltage[1] ..................................0.5V to VCC+0.5V
Current into Outputs (LOW).......................................... 20 mA
Static Discharge Voltage............................................. >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current........................................................>200 mA


Description

The CY7C1021BNV is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Writing to CY7C1021BNV33 is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0 through A15). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O9 through I/O16)CY7C1021BNV33  is written into the location specified on the address pins (A0 through A15).

Reading from CY7C1021BNV33 is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the back of CY7C1021BNV33 sheet for a complete description of read and write modes.

The input/output pins (I/O1 through I/O16) are placed in a high-impedance state when CY7C1021BNV33 is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).

The CY7C1021BNV is available in 400-mil-wide SOJ, standard 44-pin TSOP Type II, and 48-ball mini BGA packages.




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