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CY7C1019D

Features: • Pin- and function-compatible with CY7C1019B• High speed - tAA = 10 ns• CMOS for optimum speed/power• Low active power - ICC = 60 mA @ 10 ns• Low CMOS standby power - ISB2 = 1.2 mA ('L' Version only)• Data Retention at 2.0V• Center power/ground ...

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SeekIC No. : 004319747 Detail

CY7C1019D: Features: • Pin- and function-compatible with CY7C1019B• High speed - tAA = 10 ns• CMOS for optimum speed/power• Low active power - ICC = 60 mA @ 10 ns• Low CMOS standb...

CY7C1019D Data Sheet

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Part Number:
CY7C1019D
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Pin- and function-compatible with CY7C1019B
• High speed
   - tAA = 10 ns
• CMOS for optimum speed/power
• Low active power
    - ICC = 60 mA @ 10 ns
• Low CMOS standby power
   - ISB2 = 1.2 mA ('L' Version only)
• Data Retention at 2.0V
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion with CE and OE options
• Functionally equivalent to CY7C1019B
• Available in Pb-Free Packages


Pinout

Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................65°C to +150°C
Ambient Temperature with
Power Applied.............................................55°C to +125°C
Supply Voltage on VCC to Relative GND[2] .... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High-Z State[2] ....................................0.5V to VCC + 0.5V
DC Input Voltage[2].................................0.5V to VCC + 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage...........................................> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... > 200 mA


Description

The CY7C1019D is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Writing to CY7C1019D is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16)CY7C1019D. Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when CY7C1019D is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW).

The CY7C1019D is available in standard 32-pin TSOP Type II and 400-mil-wide SOJ Pb-Free packages.




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