Features: • High speed-tAA = 10 ns• CMOS for optimum speed/power• Center power/ground pinout• Automatic power-down when deselected• Easy memory expansion with CE and OE options• Functionally equivalent to CY7C1019V33 and/or CY7C1018V33PinoutSpecifications(Above ...
CY7C1019BV33-15VC: Features: • High speed-tAA = 10 ns• CMOS for optimum speed/power• Center power/ground pinout• Automatic power-down when deselected• Easy memory expansion with CE and OE...
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The CY7C1019BV33/CY7C1018BV33 is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers.
CY7C1019BV33-15VC has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16).
Reading from CY7C1019BV33-15VC is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when CY7C1019BV33-15VC is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW).
The CY7C1019BV33 is available in a standard 400-mil-wide package. The CY7C1018BV33 is available in a standard 300-mil-wide package.