CY7C10191B

Features: • High speed - tAA = 10, 12, 15 ns• CMOS for optimum speed/power• Center power/ground pinout• Automatic power-down when deselected• Easy memory expansion withCE andOE options• Functionally equivalent to CY7C1019PinoutSpecifications(Above which the usef...

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CY7C10191B Picture
SeekIC No. : 004319741 Detail

CY7C10191B: Features: • High speed - tAA = 10, 12, 15 ns• CMOS for optimum speed/power• Center power/ground pinout• Automatic power-down when deselected• Easy memory expansion with...

floor Price/Ceiling Price

Part Number:
CY7C10191B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

• High speed
   - tAA = 10, 12, 15 ns
• CMOS for optimum speed/power
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion with CE and OE options
• Functionally equivalent to CY7C1019



Pinout

  Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................65°C to +150°C
Ambient Temperature with
Power Applied.............................................55°C to +125°C
Supply Voltage on VCC to Relative GND[1] .... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[1] ....................................0.5V to VCC + 0.5V
DC Input Voltage[1].................................0.5V to VCC + 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage............................................ >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.....................................................>200 mA



Description

The CY7C1019B/10191B is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. CY7C10191B has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16).

Reading from CY7C10191B is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when CY7C10191B is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW).

The CY7C1019B/10191B is available in standard 32-pin TSOP Type II and 400-mil-wide SOJ packages. Customers should use part number CY7C10191B when ordering parts with 10 ns tAA, and CY7C1019B when ordering 12 and 15 ns tAA.




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