CY7C1018DV33

Features: • Pin- and function-compatible with CY7C1018CV33• High speed - tAA = 8 ns• Low Active Power - Icc = 75 mA @ 8 ns• Low CMOS Standby Power - Isb2 = 3 mA• CMOS for optimum speed/power• Center power/ground pinout• Data retention at 2.0V• Automa...

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CY7C1018DV33 Picture
SeekIC No. : 004319738 Detail

CY7C1018DV33: Features: • Pin- and function-compatible with CY7C1018CV33• High speed - tAA = 8 ns• Low Active Power - Icc = 75 mA @ 8 ns• Low CMOS Standby Power - Isb2 = 3 mA• CMOS f...

floor Price/Ceiling Price

Part Number:
CY7C1018DV33
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/9

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Product Details

Description



Features:

• Pin- and function-compatible with CY7C1018CV33
• High speed
   - tAA = 8 ns
• Low Active Power
    - Icc = 75 mA @ 8 ns
• Low CMOS Standby Power
    - Isb2 = 3 mA
• CMOS for optimum speed/power
• Center power/ground pinout
• Data retention at 2.0V
• Automatic power-down when deselected
• Easy memory expansion withCE and OE options
• Available in Pb-Free 300-mil-wide 32-pin SOJ



Pinout

  Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................65°C to +150°C
Ambient Temperature with
Power Applied.............................................55°C to +125°C
Supply Voltage on VCC to Relative GND[2] ... 0.5V to + 4.6V
DC Voltage Applied to Outputs[2]
in High-Z State .......................................0.5V to VCC + 0.5V
DC Input Voltage[2].................................0.5V to VCC + 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage...........................................> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... > 200 mA



Description

The CY7C1018DV33 is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Writing to CY7C1018DV33 is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16).

Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when CY7C1018DV33 is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, andWE LOW).

The CY7C1018DV33 is available in a standard Pb-Free 300-mil-wide 32-Lead SOJ.




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