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CY7C1011

Features: • High speed -tAA = 15 ns• Low active power -1150 mW (max.)• Low CMOS standby power (L version) -40 mW (max.)• 2.0V Data Retention (4 mW at 2.0V retention)• Automatic power-down when deselected• TTL-compatible inputs and outputs• Easy memory expa...

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SeekIC No. : 004319732 Detail

CY7C1011: Features: • High speed -tAA = 15 ns• Low active power -1150 mW (max.)• Low CMOS standby power (L version) -40 mW (max.)• 2.0V Data Retention (4 mW at 2.0V retention)• A...

CY7C1011 Data Sheet

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Part Number:
CY7C1011
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High speed
   -tAA = 15 ns
• Low active power
   -1150 mW (max.)
• Low CMOS standby power (L version)
   -40 mW (max.)
• 2.0V Data Retention (4 mW at 2.0V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features


Pinout

Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .............................65°C to +150°C
Ambient Temperature with
Power Applied .........................................55°C to +125°C
Supply Voltage on VCC to Relative GND[1] .... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[1] ..................................0.5V to VCC + 0.5V
DC Input Voltage[1] ..............................0.5V to VCC + 0.5V
Current into Outputs (LOW)......................................... 20 mA


Description

The CY7C1011 is a high-performance CMOS static RAM organized as 131,072 words by 16 bits.

Writing to CY7C1011 is accomplished by taking chip enable (CE) and write enable (WE) inputs LOW. If byte low enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If byte high enable (BHE)CY7C1011  is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16).

Reading from CY7C1011 is accomplished by taking chip enable (CE) and output enable (OE) LOW while forcing the write enable (WE) HIGH. If byte low enable (BLE) is LOW, then data from the memory location specified by the address pins ofCY7C1011 will appear on I/O0 to I/O7. If byte high enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this datasheet for a complete description of read and write modes.

The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when CY7C1011 is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).

The CY7C1011 is available in a standard 44-pin TSOP II package with center power and ground (revolutionary) pinout.




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