Features: • FCT-E speed at 3.8 ns
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for significantly improved noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
• Industrial temperature range of -40°C to +85°C
• VCC = 5V ± 10%
CY74FCT16652T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25°C
CY74FCT162652T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA= 25°CPinoutSpecificationsStorage Temperature ........................................................Com'l -55°C to +125°C
Ambient Temperature with Power Applied .........................Com'l -55°C to +125°C
DC Input Voltage ..................................................................................-0.5V to +7.0V
DC Output Voltage ................................................................................-0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ..................................-60 to +120 mA
Power Dissipation .................................................................................................1.0W
Static Discharge Voltage....................................................................................>2001VDescriptionThese 16-bit, high-speed, low-power, registered transceivers, CY74FCT162652T are organized as two independent 8-bit bus transceivers with three-state D-type registers and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal storage registers. OEBA and OEBA control pins are provided to control the transceiver functions. SAB and SBA control pins of CY74FCT162652T are provided to select either real-time or stored data transfer.
Data on the A or B data bus, or both, CY74FCT162652T can be stored in the internal D flip-flops by LOW-to-HIGH transitions at the appropriate clock pins (CLKAB or CLKBA ), regardless of the select or enable control pins. When SAB and SBA are in the real-time transfer mode, CY74FCT162652T is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEBA and OEBA . In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines will remain at its last state. The output buffers of CY74FCT162652T are designed with a power-off disable feature that allows live insertion of boards.
The CY74FCT16652T is ideally suited for driving high-capacitance loads and low-impedance backplanes.
The CY74FCT162652T has 24-mA balanced output drivers with current-limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162652T is ideal for driving transmission lines.