Features: FCT-E speed at 3.8 ns Power-off disable outputs permits live insertion Edge-rate control circuitry for significantly improved noise characteristicsTypical output skew < 250 ps ESD > 2000VTSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages Industrial temperature range of - 40?C ...
CY74FCT162646T: Features: FCT-E speed at 3.8 ns Power-off disable outputs permits live insertion Edge-rate control circuitry for significantly improved noise characteristicsTypical output skew < 250 ps ESD > ...
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Encoders, Decoders, Multiplexers & Demultiplexers 1-of-8 Decoder
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Encoders, Decoders, Multiplexers & Demultiplexers 1-OF-8 DECODER
US $.42 - .46 / Piece
Encoders, Decoders, Multiplexers & Demultiplexers 1-of-8 Decoder
FCT-E speed at 3.8 ns
Power-off disable outputs permits live insertion
Edge-rate control circuitry for significantly improved
noise characteristics
Typical output skew < 250 ps
ESD > 2000V
TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
Industrial temperature range of - 40?C to +85?C
VCC = 5V 10%
CY74FCT16646T Features:
64 mA sink current, 32 mA source current
Typical V OLP (ground bounce) <1.0V at V CC = 5V,
TA = 25
CY74FCT162646T Features:
Balanced 24 mA output drivers
Reduced system switching noise
Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA = 25
Storage Temperature ..........................Com'l - 55 C to +125 C
Ambient Temperature with
Power Applied......................................Com'l - 55 C to +125 C
DC Input Voltage................................................- 0.5V to +7.0V
DC Output Voltage.............................................- 0.5V to +7.0V
DC Output Current
(Maximum Sink Current/Pin)..............................- 60 to +120 mA
Power Dissipation...............................................................1.0W
Static Discharge Voltage.................................................>2001V
(per MIL-STD-883, Method 3015)
The CY74FCT16646T and CY74FCT162646T 16-bit transceivers are three-state, D-type registers, and control circuitry arranged for multiplexed transmission of data directly fromtheinputbusorfromtheinternalregisters.DataontheA or B bus will be clocked into the registers CY74FCT16646T and CY74FCT162646T as the appropriate clock pin goes to a HIGH logic level. Output Enable (OE) anddirection pins (DIR) are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register, or in both. The select controls can multiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the Output Enable (OE) isActiveLOW.Intheisolationmode(OutputEnable(OE)HIGH), A data may be stored in the B register and/or B data may be stored in the A register. The output buffers are designed withapower-offdisablefeaturethatallowsliveinsertionofboards. The CY74FCT16646T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162646T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162646T is ideal for driving transmission lines.