CY62256VN

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ........................................................65°C to + 150°C
Ambient Temperature with Power Applied..........................55°C to + 125°C
Supply Voltage to Ground Potential (Pin 28 to Pin 14) ............ 0.5V to + 4.6V
DC Voltage Applied to Outputs in High-Z State^[3] .............0.5V to V_CC + 0.5V
DC Input Voltage^[3]...........................................................0.5V to V_CC + 0.5V
Output Current into Outputs (LOW) .........................................................20 mA
Static Discharge Voltage....................................................................... > 2001V
(per MIL-STD-883, Method 3015) Latch-up Current............................ > 200 mA

The CY62256VN family is composed of two high-performance CMOS static RAM's organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE) and active LOW output enable (OE) and tri-state drivers. CY62256VN has an automatic power-down feature, reducing the power consumption by over 99% when deselected.

An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs of CY62256VN are both LOW, data on the eight data input/output pins (I/O₀ through I/O₇) is written into the memory location addressed by the address present on the address pins (A₀ through A₁₄). Reading the device is accomplished by selecting the CY62256VN and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input/output pins.

The input/output pins of CY62256VN remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH.