CY62256N

The CY62256N is a high-performance CMOS static RAM organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE) and active LOW output enable (OE) and tri-state drivers. CY62256N has an automatic power-down feature, reducing the power consumption by 99.9% when deselected.

An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs of CY62256N are both LOW, data on the eight data input/output pins (I/O₀ through I/O₇) is written into the memory location addressed by the address present on the address pins (A₀ through A₁₄). Reading the CY62256N is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins of CY62256N are present on the eight data input/output pins.

The input/output pins of CY62256N remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH.