Features: • Very high speed: 55 ns• Wide voltage range: 2.20V 3.60V• Ultra-low active power - Typical active current: 2 mA @ f = 1 MHz - Typical active current: 15 mA @ f = fmax• Ultra-low standby power• Easy memory expansion with CE1, CE2, and OE features• Aut...
CY62167DV30: Features: • Very high speed: 55 ns• Wide voltage range: 2.20V 3.60V• Ultra-low active power - Typical active current: 2 mA @ f = 1 MHz - Typical active current: 15 mA @ f = fmax...
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Features: • Very high speed: 45 ns• Wide voltage range: 2.2V to 3.6V• Pin compat...
Storage Temperature ..........................................................................65°C to + 150°C
Ambient Temperature with Power Applied............................................55°C to + 125°C
Supply Voltage to Ground Potential ..................................................0.2V to VCC + 0.3V
DC Voltage Applied to Outputs in High-Z State[6, 7] .........................0.2V to VCC + 0.3V
DC Input Voltage[6, 7] ......................................................................0.2V to VCC + 0.3V
Output Current into Outputs (LOW)........................................................................ 20 mA
Static Discharge Voltage...................................................................................... > 2001V
(per MIL-STD-883, Method 3015) Latch-up Current............................................ > 200 mA
The CY62167DV30 is a high-performance CMOS static RAM organized as 1M words by 16 bits. CY62167DV30 features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery LifeTM (MoBL®) in portable applications such as cellular telephones. The CY62167DV30 also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The CY62167DV30 can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1HIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a Write operation (CE1 LOW, CE2 HIGH and WE LOW).
Writing to the CY62167DV30 is accomplished by taking Chip Enables (CE1 LOW and CE2 HIGH) and Write Enable (WE) input LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A19). If Byte High Enable (BHE) is LOW, then data of CY62167DV30 from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A19).
Reading from the CY62167DV30 is accomplished by taking Chip Enables (CE1 LOW and CE2 HIGH) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data of CY62167DV30 from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of Read and Write modes.