CY62157EV18

The CY62157EV18 is a high performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The CY62157EV18 also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling. The device can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH).

The input and output pins of CY62157EV18 (IO0 through IO15) are placed in a high impedance state when:
• Deselected (CE1 HIGH or CE2 LOW)
• Outputs are disabled (OE HIGH)
• Both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH) or
• Write operation is active (CE1 LOW, CE2 HIGH and WE LOW). Write to the device by taking Chip Enables (CE1 LOW and CE2 HIGH) and Write Enable (WE) input LOW.

If Byte Low Enable (BLE) is LOW, then data of CY62157EV18 from IO pins (IO0 through IO7), is written into the location specified on the address pins (A0 through A18). If Byte High Enable (BHE) is LOW, then data from IO pins (IO8 through IO15) is written into the location specified on the address pins (A0 through A18). Read from the CY62157EV18 by taking Chip Enables (CE1 LOW and CE2 HIGH) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH.

If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins of CY62157EV18 appear on IO0 to IO7. If Byte High Enable (BHE) is LOW, then data from memory appears on IO8 to IO15. See the "Truth Table" on page 9 for a complete description of read and write modes.