CY62157CV18

Storage Temperature .............................................................................65°C to +150°C
Ambient Temperature with Power Applied.............................................. 55°C to +125°C
Supply Voltage to Ground Potential ........................................................... 0.2V to +2.4V
DC Voltage Applied to Outputs in High Z State^[3]...............................0.2V to VCC + 0.2V
DC Input Voltage^[3] .......................................................................... −0.2V to VCC + 0.2V
Output Current into Outputs (LOW)......................................................................... 20 mA
Static Discharge Voltage ....................................................................................... >2001V
(per MIL-STD-883, Method 3015) Latch-Up Current .............................................>200 mA

The CY62157CV18 is a high-performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. CY62157CV18 is ideal for providing More Battery Life™ (MoBL™) in portable applications such as cellular telephones.

The CY62157CV18 also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE₁ HIGH or CE₂ LOW or both BHE and BLE are HIGH).The input/output pins of CY62157CV18 (I/O₀ through I/O₁₅) are placed in a high-impedance state when: deselected (CE₁ HIGH or CE₂ LOW), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE₁ LOW, CE₂ HIGH and WE LOW).

Writing to the CY62157CV18 is accomplished by taking Chip Enables (CE₁ LOW and CE₂ HIGH) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O₀ through I/O₇), is written into the location specified on the address pins of CY62157CV18(A0 through A18). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O₈ through I/O₁₅) is written into the location specified on the address pins (A₀ through A₁₈).

Reading from the CY62157CV18 is accomplished by taking Chip Enable (CE₁ LOW and CE₂ HIGH) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data of CY62157CV18 from the memory location specified by the address pins will appear on I/O₀ to I/O₇. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O₈ to I/O₁₅. See the truth table at the back of this datasheet for a complete description of read and write modes.

The CY62157CV18 is available in a 48-ball FBGA package.