Features: • Low voltage range:-1.8V 3.6V• Ultra low active power• Low standby power• TTL-compatible inputs and outputs• Automatic power-down when deselected• CMOS for optimum speed/powerPinoutSpecifications(Above which the useful life may be impaired. For user ...
CY62148V: Features: • Low voltage range:-1.8V 3.6V• Ultra low active power• Low standby power• TTL-compatible inputs and outputs• Automatic power-down when deselected• CMO...
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Features: • Very high speed: 45 ns• Wide voltage range: 2.2V to 3.6V• Pin compat...
The CY62148V is a high-performance CMOS static RAM organized as 524,288 words by 8 bits. CY62148V features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL™) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling.
The CY62148V can be put into standby mode when deselected (CE HIGH).
Writing to the CY62148V is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18).
Reading from the CY62148V is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.
The eight input/output pins of CY62148V (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CEHIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW and WE LOW).
The CY62148V MoBL SRAM has an extremely wide operating voltage range. The data sheet has been specified to accurately describe the device behavior at three common voltage ranges (3.62.7, 2.72.3, 2.31.8).
The CY62148V is available in a 36-ball FBGA, 32 pin TSOPII and a 32-pin SOIC package.