CY62147DV30

Features:

• Temperature Ranges
    - Industrial: 40°C to +85°C
   - Automotive: 40°C to +125°C
• Very high speed: 45 ns
• Wide voltage range: 2.20V3.60V
• Pin-compatible with CY62147CV25, CY62147CV30, and CY62147CV33
• Ultra-low active power
    - Typical active current: 1.5 mA @ f = 1 MHz
    - Typical active current: 8 mA @ f = f_max
• Ultra low standby power
• Easy memory expansion with CE, and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Packages offered 48-ball BGA and 44-pin TSOPII
• Available in Lead-Free packages
• Byte power-down feature


Pinout




Specifications

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................65°C to +150°C
Ambient Temperature with
Power Applied.............................................55°C to +125°C
Supply Voltage to Ground
Potential ......................................0.3V to + V_CC(MAX) + 0.3V
DC Voltage Applied to Outputs
in High-Z State^[6,7]..........................0.3V to V_CC(MAX) + 0.3V
DC Input Voltage^[6,7] ..................... 0.3V to V_CC(MAX) + 0.3V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage........................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-up Current...................................................... >200 mA


Description

The CY62147DV30 is a high-performance CMOS static RAM organized as 256K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL^®) in portable applications such as cellular telephones. The CY62147DV30 also has an automatic power-down feature that significantly reduces power consumption. The device can also be put into standby mode reducing power consumption of CY62147DV30 by more than 99% when deselected (CE HIGH or both BLE and BHE are HIGH). The input/output pins (I/O₀ through I/O₁₅) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE LOW and WE LOW).

Writing to the CY62147DV30 is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O₀ through I/O₇), is written into the location specified on the address pins (A₀ through A₁₇). If Byte High Enable (BHE) is LOW, then data of CY62147DV30 from I/O pins (I/O₈ through I/O₁₅) is written into the location specified on the address pins (A₀ through A₁₇).

Reading from the CY62147DV30 is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O₀ to I/O₇. If Byte High Enable (BHE) is LOW, then data of CY62147DV30 from memory will appear on I/O₈ to I/O₁₅. See the truth table at the back of this data sheet for a complete description of read and write modes.

The CY62147DV30 is available in a 48-ball VFBGA, 44 Pin TSOPII packages.