CY62146EV30

The CY62146EV30 is a high performance CMOS static RAM organized as 256K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL^®) in portable applications such as cellular telephones. The CY62146EV30 also has an automatic power down feature that significantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected (CE HIGH). The input and output pins of CY62146EV30 (IO₀ through IO₁₅) are placed in a high impedance state when:
• Deselected (CE HIGH)
• Outputs are disabled (OE HIGH)
• Both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH)
• Write operation is active (CE LOW and WE LOW)

Write to the CY62146EV30 by taking Chip Enable (CE) and Write Enable (_WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from IO pins (IO₀ through IO₇), is written into the location specified on the address pins (A₀ through A₁7). If Byte High Enable (_BHE) is LOW, then data from IO pins of CY62146EV30 (IO₈ through IO₁₅) is written into the location specified on the address pins (A₀ through A₁₇).

Read from the CY62146EV30 by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins appear on IO₀ to _IO7. If Byte High Enable (BHE ) is LOW, then data of CY62146EV30 from memory appears on IO₈ to IO₁₅. See the "Truth Table" on page 9 for a complete description of read and write modes.