CY62146CV18

The CY62146CV18 is a high-performance CMOS static RAM organized as 256K words by 16 bits. CY62146CV18 feature advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL™) in portable applications such as cellular telephones. The CY62146CV18 also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The CY62146CV18 can also be put into standby mode when deselected (CE HIGH). The input/output pins (I/O₀ through I/O₁₅) are placed in a high-impedance state when deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).

Writing to the CY62146CV18 is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O₀ through I/O₇), is written into the location specified on the address pins (A₀ through A₁₆). If Byte High Enable (BHE) is LOW, then data from I/O pins of CY62146CV18 (I/O₈ through I/O₁₅) is written into the location specified on the address pins (A₀ through A₁₇).

Reading from the CY62146CV18 is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O₀ to I/O₇. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O₈ to I/O₁₅. See the truth table at the back of this data sheet of CY62146CV18 for a complete description of read and write modes.

The CY62146CV18 is available in a 48-Ball FBGA package.