CY62138FV30

The CY62138FV30 is a high performance CMOS static RAM organized as 256K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL^®) in portable applications such as cellular telephones. The CY62138FV30 also has an automatic power down feature that significantly reduces power consumption. Place the device into standby mode reducing power consumption when deselected (CE₁ HIGH or CE₂ LOW).

To write to the CY62138FV30, take Chip Enable (CE₁ LOW and CE₂ HIGH) and Write Enable (WE) inputs LOW. Data on the eight IO pins (IO₀ through IO₇) is then written into the location specified on the address pins (A₀ through A₁₇).

To read from the CY62138FV30, take Chip Enable (CE₁ LOW and CE₂ HIGH) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the IO pins.

The eight input and output pins of CY62138FV30 (IO₀ through IO₇) are placed in a high impedance state when the device is deselected (CE₁ HIGH or CE₂ LOW), the outputs are disabled (OE HIGH), or during a write operation (CE₁ LOW and CE₂ HIGH and WE LOW).