Features: • High speed: 45 ns• Wide voltage range: 4.5 V 5.5 V• Pin compatible with CY62138V• Ultra low standby power- Typical standby current: 1 A- Maximum standby current: 5 A• Ultra low active power- Typical active current: 1.6 mA @ f = 1 MHz• Easy memory ex...
CY62138F: Features: • High speed: 45 ns• Wide voltage range: 4.5 V 5.5 V• Pin compatible with CY62138V• Ultra low standby power- Typical standby current: 1 A- Maximum standby current:...
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Features: • Very high speed: 45 ns• Wide voltage range: 2.2V to 3.6V• Pin compat...
The CY62138F is a high performance CMOS static RAM organized as 256K words by 8 bits. This device features advanced circuit design to provide ultra low active current.
This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The CY62138F also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling.
Placing the CY62138F into standby mode reduces power consumption by more than 99% when deselected (CE1 HIGH or CE2 LOW).
To write to the CY62138F, take Chip Enable (CE1 LOW and CE2 HIGH) and Write Enable (WE) inputs LOW. Data on the eight IO pins (IO0 through IO7) is then written into the location specified on the address pins (A0 through A17).
To read from the CY62138F, take Chip Enable (CE1 LOW and CE2 HIGH) and output enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the IO pins.
The eight input and output pins of CY62138F (IO0 through IO7) are placed in a high impedance state when the device is deselected (CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW and CE2 HIGH and WE LOW).