CY62138CV

The CY62138CV25/30/33 and CY62138CV are high-performance CMOS static RAMs organized as 256K words by eight bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications. The CY62138CV25/30/33 and CY62138CV also has an automatic power-down feature that significantly reduces power consumption by 80% when addresses are not toggling. The device can be put into standby mode reducing power consumption by more than 99% when deselected (CE₁ HIGH or CE₂ LOW).

Writing to the CY62138CV25/30/33 and CY62138CV is accomplished by taking Chip Enable 1 (CE₁) and Write Enable (WE) inputs LOW and Chip Enable 2 (CE₂) HIGH. Data on the eight I/O pins (I/O₀ through I/O₇) is then written into the location specified on the address pins (A₀ through A₁₇).

Reading from the CY62138CV25/30/33 and CY62138CV is accomplished by taking Chip Enable 1 (CE₁) and Output Enable (OE) LOW while forcing Write Enable (WE) and Chip Enable 2 (CE₂) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins of CY62138CV25/30/33 and CY62138CV (I/O₀ through I/O₇) are placed in a high-impedance state when the CY62138CV25/30/33 and CY62138CV is deselected (CE₁ HIGH or CE₂ LOW), the outputs are disabled (OE HIGH), or during a write operation (CE₁ LOW, CE₂ HIGH and WE LOW). See the truth table at the back of this data sheet for a complete description of read and write modes.