CY62128V

Features:

• Low voltage range:
-2.7V3.6V (CY62128V)
-2.3V2.7V (CY62128V25)
-1.6V2.0V (CY62128V18)
• Low active power and standby power
• Easy memory expansion with CEand OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power


Pinout




Specifications

Storage Temperature ................................. 65°C to +150°C
Ambient Temperature with
Power Applied............................................. 55°C to +125°C
Supply Voltage to Ground Potential
(Pin 28 to Pin 14) .............................................. 0.5V to +4.6V
DC Voltage Applied to Outputs
in High Z State^[1] ......................................0.5V to V_CC + 0.5V
DC Input Voltage^[1]...................................0.5V to V_CC + 0.5V
Output Current into Outputs (LOW) ................................ 20 mA
Static Discharge Voltage ............................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.......................................................... >200 mA


Description

The CY62128V family is composed of three high-performance CMOS static RAMs organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE1), an active HIGH Chip Enable (CE2), an active and three-state drivers. These devices have an automatic power-down feature, reducing the power consumption by over 99% when deselected. The CY62128V family is available in the standard 450-mil-wide SOIC, 32-lead TSOP-I, and STSOP packages.

Writing to the CY62128V is accomplished by taking Chip Enable one (CE1) and Write Enable (WE) inputs LOW and the Chip Enable two (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16).

Reading from the CY62128V is accomplished by taking Chip Enable one (CE1) and Output Enable (OE) LOW while forcing Write Enable (WE) and Chip Enable two (CE2) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins (I/O0 through I/O7) CY62128V are placed in a high-impedance state when the device is deselected (CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW, CE2 HIGH, and WE LOW).