Features: • Temperature Ranges
- Commercial: 0°C to 70°C
- Industrial: 40°C to 85°C
- Automotive: 40°C to 125°C
• 4.5V 5.5V operation
• CMOS for optimum speed/power
• Low active power(70 ns, LL version, Commercial, Industrial)
- 82.5 mW (max.) (15 mA)
• Low standby power(70 ns, LL version, Commercial, Industrial)
- 110 µW (max.) (15 µA)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE1 , CE2 , and OE optionsPinoutSpecificationsStorage Temperature .................................65°C to +150°C
Ambient Temperature with
Power Applied.............................................55°C to +125°C
Supply Voltage on VCC to Relative GND[3] .... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High-Z State[3] ....................................0.5V to VCC + 0.5V
DC Input Voltage[3].................................0.5V to VCC + 0.5V
Current into Outputs (LOW)........................................... 20 mA
Static Discharge Voltage..............................................> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current........................................................ > 200 mADescriptionThe CY62128B is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE1 ),an active HIGH Chip Enable (CE2 ), an active LOW Output Enable (OE), and three-state drivers. This device has an automatic power-down feature that reduces power consumption by more than 75%when deselected.
Writing to the device is accomplished by taking Chip Enable One (CE1 ) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2 ) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip Enable One (CE1) and Output Enable (OE) LOW while forcing Write Enable (WE ) and Chip Enable Two (CE2) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) CY62128B are placed in a high-impedance state when the device is deselected (CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW, CE2 HIGH, and WE LOW).
The CY62128B is available in a standard 450-mil-wide SOIC,32-pin TSOP type I and STSOP packages.