CY62128

Features:

• 4.5V - 5.5V operation
• CMOS for optimum speed/power
• Low active power (70 ns, LL version)
-330 mW (max.) (60 mA)
• Low standby power (70 ns, LL version)
-110 mW (max.) (20 mA)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE1 , CE2 , and OE options


Pinout




Specifications

Storage Temperature ................................. 65°C to +150°C
Ambient Temperature with
Power Applied............................................. 55°C to +125°C
Supply Voltage on VCC to Relative GND^[1] ....... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State^[1] .......................................0.5V to VCC +0.5V
DC Input Voltage^[1]....................................0.5V to VCC +0.5V
Current into Outputs (LOW) ............................................ 20 mA
Static Discharge Voltage ................................................ >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current........................................................... >200 mA


Description

The CY62128 is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE1 ), an active HIGH chip enable (CE2 ), an active LOW output enable (OE ), and three-state drivers. This device has an automatic power-down  feature that reduces power consumption by more than 75%when deselected.
Writing to the device is accomplished by taking chip CY62128 enable one (CE1 ) and write enable (WE) inputs LOW and chip enable two (CE2 ) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking chip enable one (CE1 ) and output enable (OE) LOW while forcing write enable (WE ) and chip enable two (CE2 ) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE1 HIGH or CE1 LOW), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW, CE2 HIGH, and WE LOW).
The CY62128 is available in a standard 400-mil-wide SOJ,525-mil wide (450-mil-wide body width) SOIC and 32-pin TSOP type I.