Features: • Operating frequency: 60 MHz to 230 MHz• Supports 400 MHz DDR SDRAM• 10 differential outputs from one differential input• Spread-Spectrum-compatible• Low jitter (cycle-to-cycle): < 75• Very low skew: < 100 ps• Power management control inpu...
CY2SSTV858-32: Features: • Operating frequency: 60 MHz to 230 MHz• Supports 400 MHz DDR SDRAM• 10 differential outputs from one differential input• Spread-Spectrum-compatible• Low jit...
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Features: • Operating frequency: DC to 500 MHz• Supports DDRII SDRAM• Two operat...
Features: • Operating frequency: 125 MHz to 500 MHz• Supports DDRII SDRAM• 1 to ...
Features: • Differential Clock Inputs up to 280 MHz• Supports LVTTL switching levels o...
The CY2SSTV858-32 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV858-32 generates ten differential pair clock outputs from one differential pair clock input. In addition, the CY2SSTV857-32 features differential feedback clock outpts and inputs. This allows the CY2SSTV858-32 to be used as a zero delay buffer. When used as a zero delay buffer in nested clock trees, the CY2SSTV857-32 locks onto the input reference and translates with near-zero delay to low-skew outputs.