Features: • Operating frequency: 60 MHz to 170 MHz• Supports 266-MHz DDR SDRAM• 5 differential outputs from 1 differential input• Spread Spectrum compatible• Low jitter (cycle-to-cycle): < 75• Very low skew: < 100 ps• Power Management Control input...
CY2SSTV8575: Features: • Operating frequency: 60 MHz to 170 MHz• Supports 266-MHz DDR SDRAM• 5 differential outputs from 1 differential input• Spread Spectrum compatible• Low jitter...
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Features: • Operating frequency: DC to 500 MHz• Supports DDRII SDRAM• Two operat...
Features: • Operating frequency: 125 MHz to 500 MHz• Supports DDRII SDRAM• 1 to ...
Features: • Differential Clock Inputs up to 280 MHz• Supports LVTTL switching levels o...
Parameter |
Description | Conditions |
Min. |
Max. |
Unit |
Vdd |
Supply Voltage | Non Functional |
0.3 |
3.5 |
VDC |
VDD |
Operating Voltage | Functional |
2.38 |
2.63 |
VDC |
Vin |
Input Voltage | Relative to VSS |
0.3 |
2.63 |
VDC |
Vout |
Output Voltage | Relative to VSS |
0.3 |
2.63 |
VDC |
Ts |
Temperature, Storage | Non Functional |
65 |
150 |
°C |
Ta |
Temperature, Operating Ambient | Functional |
0 |
+85 |
°C |
ØJc |
Dissipation, Junction to Case | Functional |
18 |
°C/W | |
ØJa |
Dissipation, Junction to Ambient | Functional |
48 |
°C/W | |
ESDh |
ESD Protection (Human Body Model) |
2K |
Volts | ||
FIT |
Failure in Time | Manufacturing test |
10 |
ppm |
The CY2SSTV8575 is a high-performance, low-skew, low jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV8575 generates five differential pair clock outputs from one differential pair clock input. In addition, the CY2SSTV8575 features differential feedback clock outputs and inputs. This allows the CY2SSTV8575 to be used as a zero-delay buffer.
When used as a zero-delay buffer in nested clock trees, the CY2SSTV8575 locks onto the input reference and translates with near zero delay to low-skew outputs.