Features: • ANSI TIA/EIA-644-1995-compliant• Designed for data rates to > 700 Mbs = (350 MHz)• Single 2 * 2 with high-drive output drivers• Low -voltage differential signaling with output voltages of ± 350 mV into 50-ohm load version (Bus LVDS)• Single 3.3V supply&...
CY2LL843: Features: • ANSI TIA/EIA-644-1995-compliant• Designed for data rates to > 700 Mbs = (350 MHz)• Single 2 * 2 with high-drive output drivers• Low -voltage differential signa...
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SupplyVoltageRange,VDD(1) | 0.5Vto4V |
Voltage Range (DE,S0,S1) | 0.5V to 6.0V |
Input Voltage Range, VIN (A or B) | 0.5V to VDD + 0.5V |
ESD (All pins) | Class 3, A: 2KV, B: 500V |
Storage Temperature Range | 65°C to 150°C |
The Cypress CY2LL843 are differential line drivers and receivers that utilize Low Voltage Signaling or LVDS, to achieve signaling rates of 700Mbs. The receiver outputs can be switched to either or both drivers through the multiplexer control signals S0/S1. This provides flexibility in application for either a splitter or router configuration with a single device. The Cypress CY2LL843 are configured as a single two-channel repeater/Mux.
The LVDS standard provides a minimum differential output voltage of 247 mV into a 50-ohm load and receipt of as little as 100 mV signals with up to 1V of DC offset between transmitter and receiver. The Cypress CY2LL843 doubles the output drive current to achieve BusLVDS signaling levels with a faster rise/fall times into 50-ohm load.
A doubly terminated BusLVDS line enables multipoint configurations. Designed for both point to point based-band multi-point data transmission over controlled impedance lines.