CY2CC810

Features:

• Low-voltage operation
• V_DD range from 2.5V to 3.3V
• 1:10 fanout
• Over voltage tolerant input hot swappable
• Drives either a 50-Ohm or 75-Ohm transmission line
• Low-input capacitance
• Low-output skew
• Low-propagation delay
• Typical (tpd < 4 ns)
• High-speed operation > 500 MHz
• Industrial versions available
• Available packages include: SOIC, SSOP


Pinout




Specifications

Storage Temperature: ................................65 to + 150
Ambient Temperature:...................................40 to +85
Supply Voltage to Ground Potential
V_CC ................................................................. 0.5V to 4.6V
Input ............................................................... 0.5V to 5.8V
Supply Voltage to Ground Potential
(Outputs only) ......................................... 0.5V to V_DD + 1V
DC Output Voltage.................................... 0.5V to V_DD + 1V
Power Dissipation........................................................ 0.75W


Description

The Cypress series of network circuits are produced using advanced 0.35-micron CMOS technology, achieving the industries fastest logic and buffers.

The Cypress CY2CC810 fanout buffer features one input and ten outputs. Designed for data communications clock management applications, the large fanout from a single input reduces loading on the input clock.

AVCMOS-type outputs dynamically adjust for variable impedance matching and eliminate the need for series damping resistors; they also reduce noise overall.