CY29947

Features: •2.5V or 3.3V operation•200-MHz clock support•LVCMOS-/LVTTL-compatible inputs•9 clock outputs: drive up to 18 clock lines•Synchronous Output Enable•Output three-state control•250 ps max. output-to-output skew•Pin compatible with MPC947, MPC...

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CY29947 Picture
SeekIC No. : 004319272 Detail

CY29947: Features: •2.5V or 3.3V operation•200-MHz clock support•LVCMOS-/LVTTL-compatible inputs•9 clock outputs: drive up to 18 clock lines•Synchronous Output Enable•Outp...

floor Price/Ceiling Price

Part Number:
CY29947
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/7/15

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Product Details

Description



Features:

•2.5V or 3.3V operation
•200-MHz clock support
•LVCMOS-/LVTTL-compatible inputs
•9 clock outputs: drive up to 18 clock lines
•Synchronous Output Enable
•Output three-state control
•250 ps max. output-to-output skew
•Pin compatible with MPC947, MPC9447
•Available in Industrial and Commercial temp. range
•32-pin TQFP package



Pinout

  Connection Diagram


Specifications

Maximum Input Voltage Relative to VSS:........... VSS 0.3V
Maximum Input Voltage Relative to VDD:...........VDD + 0.3V
Storage Temperature:.........................65°C to + 150°C
Operating Temperature:.........................40°C to +85°C
Maximum ESD protection................................................2kV
Maximum Power Supply:...............................................5.5V
Maximum Input Current:..........................................±20 mA



Description

The CY29947 is a low-voltage 200-MHz clock distribution buff-er with the capability to select one of two LVCMOS/LVTTL compatible clock inputs. The two clock sources can be used to provide for a test clock as well as the primary system clock.All other control inputs are LVCMOS/LVTTL compatible. The 9 outputs are LVCMOS or LVTTL compatible and can drive 50Ω series or parallel terminated transmission lines.For series ter- minated transmission lines, each output can drive one or two traces giving the device an effective fanout of 1:18. The out-puts can also be three-stated via the three-state input TS#.Low output-to-output skews make the CY29947 an ideal clock distribution buffer for nested clock trees in the most demand-ing of synchronous systems.

The CY29947 also provides a synchronous output enable in-put for enabling or disabling the output clocks. Since this input is internally synchronized to the input clock, potential output glitching or runt pulse generation is eliminated.




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