CXP921064A

• An efficient instruction set as a controller
    - Direct addressing, numerous abbreviated forms, multiplication and division instructions
• Instruction sets for C language and RTOS
    - Highly quadratic instruction system, generalpurpose register of eigth 16-bit ´ 16-bank configuration
• Minimum instruction cycle :100ns at 20MHz operation (2.7 to 3.3V) 61s at 32kMHz operation (2.2 to 3.3V)
• Incorporated ROM capacity :256K bytes
• Incorporated RAM capacity: 10K bytes
• Peripheral functions
    - A/D converter :8-bit 12 analog input, 2 channels successive approximation system, automatic scanning function, (Conversion time: 3.4s at 20MHz)
    - Serial interface:128 -byte buffer RAM, 3 channels 8-stage FIFO, 1 channel (supports special mode master/slave)
    - I²C bus interface: 64-byte buffer RAM , 2 channels (supports master/slave and automatic transfer mode)
    - Timers :8-bit timer/counter, 2 channels (with timing output) 16-bit timer, 3 channels
    - Real-time pulse generator :5-bit output, 1 channel (2-stage FIFO)
    - Clock prescaler
    - Remote control receive circuit :8-bit pulse measurement counter, 8-stage FIFO
• Interruption :30 factors, 30 vectors, multi-interruption and priority selection possible
• Standby mode :Sleep/stop
• Package :100-pin plastic QFP/LQFP 104-pin plastic LFLGA
• Piggy/evaluation chip: CXP921000A
• FLASH EEPROM incorporated version :CXP921F064A