CXG1047FN

Features: • Single positive rail only• Typical output power of 35.5dBm at 900MHz and 33dBm at 1800MHz• Typical efficiency of 37% at 900MHz and 37% at 1800MHz• Small package size with integral heat-sink: 16-pin HSOF (5.6 ´ 4.4 ´ 0.9mm)• 3-stage amplifier ch...

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SeekIC No. : 004318637 Detail

CXG1047FN: Features: • Single positive rail only• Typical output power of 35.5dBm at 900MHz and 33dBm at 1800MHz• Typical efficiency of 37% at 900MHz and 37% at 1800MHz• Small package s...

floor Price/Ceiling Price

Part Number:
CXG1047FN
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• Single positive rail only
• Typical output power of 35.5dBm at 900MHz and 33dBm at 1800MHz
• Typical efficiency of 37% at 900MHz and 37% at 1800MHz
• Small package size with integral heat-sink: 16-pin HSOF (5.6 ´ 4.4 ´ 0.9mm)
• 3-stage amplifier chain
• Simple pin diode circuitry is used to switch between 1800 and 900MHz matching circuits
• Off mode insertion loss typically 27dB at 900MHz (Pin = +6dBm at VDD = 0V)
• Typical transmit noise @20MHz offset 79dBm/100kHz



Application

Dual-band handsets transmitting on the GSM900 or DCS1800 frequencies


Pinout

  Connection Diagram


Specifications

Drain voltage

VDD1, VDD2, VDD3

8

V

Gate voltage

VGG1, VGG2, VGG3

5 to +1

V

Input power

Pin, max.

12

dBm

Channel temperature

Tch, max.

150

°C

Operating temperature

Ta

30 to +90

°C

Storage temperature

Tstg

40 to +150

°C




Description

The CXG1047FN dual band GaAs PA is a 3-stage power amplifier that may be used for both GSM900 and DCS1800 applications. To achieve minimum die-size and package dimensions, it contains one amplifier chain with a single input and output.

The CXG1047FN has a single RF input for both the GSM900 and DCS1800 transmit signals. The amplifier can be configured for 2 separate inputs. Power control is best achieved by variation of VDD1/VDD2 and VDD3 drain voltages with an external transistor. A proposed power control circuit configuration is described. External PMOS drain switch should be used to achieve low leakage.




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