Features: Single-channel Digital Decimation Filter
Multiple On-chip FIR and IIR Coefficient Sets
Programmable Coefficients for Custom Filters
Synchronous Operation
Integrated PLL for Clock Generation
1.024 MHz, 2.048 MHz, or 4.096 MHz Input
Standard Clock or Manchester Input
Selectable Output Word Rate
4000, 2000, 1000, 500, 333, 250 SPS
200, 125, 100, 50, 40, 25, 20, 10, 5, 1 SPS
Digital Gain and Offset Corrections
Test DAC Bit-stream Generator
Sine Wave or Impulse Output Mode
Time Break Controller, General-purpose I/O
Microcontroller or EEPROM Configuration
Small-footprint, 28-pin SSOP Package
Low Power Consumption
16 mW at 500 SPS OWR
Flexible Power Supplies
I/O Interface and PLL: 3.3 V or 5.0 V
Digital Logic Core: 2.5 V, 3.3 V or 5.0 V
Specifications
| Description |
Resolution (bits) |
Dynamic Range (dB) |
THD (dB) |
Power Consumption Per Channel (mW) |
Signal Range (V) |
Package |
| Filter with PLL |
- |
- |
- |
20 |
- |
28 SSOP |
| Parameter |
Symbol |
Min |
Max |
Unit |
DC Power Supplies Logic Core
PLL
I/O
|
VDDCORE
VDDPLL
VDDPAD
|
-0.3
-0.3
-0.3 |
6.0
6.0
6.0
VVV |
V
V
V |
|
Input Current, Any Pin Except Supplies (Note 1) |
IIN |
- |
±10 |
mA |
| Input Current, Power Supplies (Note 1) |
IIN |
- |
±50 mA
|
mA |
| Output Current (Note 1) |
IOUT |
- |
±25 |
mA |
| Power Dissipation |
PDN |
- |
500 |
mW |
| Digital Input Voltages |
VIND |
-0.3 |
VDD+0.3 |
V |
| Ambient Operating Temperature (Power Applied) |
TA |
-40 |
85 |
°C |
| Storage Temperature Range |
TSTG |
-65 |
150 |
°C |
DescriptionThe CS5378 is a multifunction digital filter utilizing a low-power signal processing architecture to achieve efficient filtering for Delta-Sigma modulators. Digital filter coefficients for the FIR and IIR filters are included on-chip or can be programmed for custom applications. Using the on-chip selectable coefficient sets, the digital filter decimation ratios produce output word rates ranging from 4,000 SPS to 1 SPS, resulting in measurement bandwidths ranging from 1,720 Hz down to 430 mHz.
The CS5378 provides highly integrated peripherals that simplify system design by offering selectable digital filter decimation ratios, offset and gain corrections, a CS5378 digital test D/A bit-stream signal generator, a time-break controller, eight general-purpose I/O pins and an on-chip PLL and SPI port.
The CS5373A Delta-Sigma modulator with integrated test DAC and the CS5378 digital filter are the foundation of our Single-S? seismic platform. When combined with the CS3301/02 differential amplifiers, this chipset can easily and quickly create a flexible high-resolution single-sensor measurement system for seismic and geophysical data acquisition.
CS5378 Data Sheet
