Features: ` Cost-effective, High-performance 32-bit DSP- 300,000,000 MAC/S (multiply accumulates per second)- Dual MAC cycles per clock- 72-bit accumulators are the most accurate in the industry- 24k x 32 SRAM, 2k blocks - assignable to data or program- Internal ROM contains a variety of configura...
CS48500: Features: ` Cost-effective, High-performance 32-bit DSP- 300,000,000 MAC/S (multiply accumulates per second)- Dual MAC cycles per clock- 72-bit accumulators are the most accurate in the industry- 24...
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PinoutSpecificationsProcessorSpeed (MIPS)Broadcasting DSPMulti-channel Decoding DSPsCar Audio DSPs...
US $5.88 - 6.49 / Piece
Digital Signal Processors & Controllers (DSP, DSC) High Perform. 32-Bit Audio Decoder DSP
` Cost-effective, High-performance 32-bit DSP
- 300,000,000 MAC/S (multiply accumulates per second)
- Dual MAC cycles per clock
- 72-bit accumulators are the most accurate in the industry
- 24k x 32 SRAM, 2k blocks - assignable to data or program
- Internal ROM contains a variety of configurable sound enhancement feature sets
- 8-channel internal DMA
- Internal watch-dog DSP lock-up prevention
` DSP Tool Set w/ Private Keys for Protecting Customer IP
` Configurable Serial Audio Inputs/Outputs
- Configurable for all input/output types
- Maximum 32-bit @ 192 kHz
- Supports 32-bit audio sample I/O between DSP chips
- TDM input modes (multiple channels on same line)
- 192 kHz SPDIF transmitter
- Multi-channel DSD direct stream digital SACD input
` Supports Two Different Input Fs Sample Rates
- Output can be master or slave
- Dual processing path capability
- Input supports dual domain slave clocking
- Hardware assist time sampling for sample rate conversion
` Integrated Clock Manager/PLL
- Can operate from external crystal, external oscillator
` Input Fs Auto Detection
` Host & Boot via Serial Interface
` Configurable GPIOs and External Interrupt Input
` 1.8V Core / 3.3V I/O that are +5V Tolerant
` Low-power Mode
- "Energy-Star Ready" via low-power mode, 350uW in standby Differentiating from the legacy Cirrus multi-standard, multichannel decoders, this new CS48500 family is still based on the same high-performance 32-bit fixed point DSP Digital Signal Processor core but instead is equipped with much less memory, tailoring it for more cost-effective applications associated with multi-channel and virtual-channel sound enhancements. Target applications are:
- Digital Televisions
- Multimedia Peripherals
- iPod® Docking Stations
- Automotive Head Units
- Automotive Outboard Amplifiers
- HD-DVD & Blu-ray Disc DVD Receivers
- PC Speakers
In these applications there are a wide variety of licensable DSP IP codes available today from:Cirrus also has developed, or is developing their own royaltyfree versions of popular features sets like Cirrus Bass Manager, Cirrus Dynamic Volume Leveler, Cirrus Original Multichannel Surround, Cirrus Virtual Speaker & Cirrus 3DAudio.
The CS48500 is programmed using the Cirrus proprietary DSP Composer™ GUI development tool. Processing chains may be designed using a drag-and-drop interface to place/utilize functional macro audio DSP primitives. The end result is a software image that is down-loaded to the DSP via serial host or serial boot modes.
The external program code may be encrypted by the programmer to protect any intellectual property it may contain. A secret, customer-specific key is used to encrypt the program code that is to be stored external to the device. Please contact your local Cirrus representative for details.
Parameter |
Symbol |
Min |
Max |
Unit |
DC power supplies: Core supply PLL supply I/O supply |VDDA VDDIO| |
VDD VDDA VDDIO |
0.3 0.3 0.3 - |
2.0 3.6 3.6 0.3 |
V V V V |
Input pin current, any pin except supplies |
Iin |
- |
+/-10 |
mA |
Input voltage on PLL_REF_RES |
Vfilt |
-0.3 |
3.6 |
V |
Input voltage on I/O pins |
Vinio |
-0.3 |
5.0 |
V |
Storage temperature |
Tstg |
-65 |
150 |
°C |
Multiplexed Pins
Many of the CS48500 pins are multi-functional. For details on pin functionality please refer to the CS48500 Hardware User's Manual.
Termination Requirements
Open-drain pins on the CS48500 must be pulled high for proper operation. Please refer to the CS48500 Hardware User's Manual to identify which pins are open-drain and what value of pull-up resistor is required for proper operation.
Mode select pins on the CS48500 are used to select the boot mode upon the rising edge from reset. A detailed explanation of termination requirements for each communication mode select pin can be found in the CS48500 Hardware User's Manual.
Pads
The CS48500 I/Os operate from the 3.3 V supply and are 5 V tolerant.